This relates generally to microelectromechanical system (MEMS) devices and their fabrication and, in particular, to MEMS devices having planar members supported by one or more via supports above underlying structure.
In micromirror-based systems used to display images by projecting the images onto a display plane, the contrast ratio of the display system has a significant impact on the perceived quality of the system. A display system's contrast ratio can be defined as a ratio of the brightest displayable gray scale (typically, pure white) to the darkest displayable gray scale (usually, pure black). The display of pure black can often be difficult to achieve in many display systems, since it is typically not feasible to turn off a light source used to display the images when there is a need to display the pure black. Rather, light from the light source is normally redirected so that the amount of light projected onto the display plane is minimized.
A typical device that uses an array of individually positionable micromirror light modulators for forming an image is a digital micromirror device (DMD), such as a Texas Instruments DLP® micromirror device. With such devices, the image is formed by positioning respective mirrors in “ON” or “OFF” positions using a pulse-width modulation scheme determined by bit planes generated for each image frame based on imaging data received for each pixel position (e.g., 8-bit RGB data per pixel per frame). In the “ON” position, the micromirror is set to reflect incident light onto the display plane (or other display target). In the “OFF” position, the micromirror is set to reflect incident light away from the display plane. Color (chroma) for each displayed pixel is determined by relative proportions of different primary and/or secondary colors of incident light directed onto the display plane during the image frame display period (eye integration time). Intensity (lumina) for each displayed pixel is determined by the relative proportion of “ON” time vs. “OFF” time for the mirror during the same image display period (viz., total of the weighted bit-position subinterval display times for which a “1” appears for that pixel in the series of bit planes generated for that frame.) When a micromirror is in a position to reflect light away from the display plane, however, there is still a possibility that scattered light from the micromirror and its underlying support structure (hinges, hinge supports, landing pads, electrical conductors, and so forth) will reach the display plane. The scattered light that reaches the display plane can lighten the darkest displayable gray scale intensity and therefore reduce the contrast ratio of the display system.
The micromirror MEMS structure of a DMD has pixel elements in the form of mirrors supported on a via support or other underlying support structure above a substrate for movement between “ON” and “OFF” positions in response to electrostatic forces applied by associated CMOS integrated circuitry. The underlying support structure of the micromirror can be coated with an antireflective coating to help reduce light scattering. However, the micromirror must be able to reflect as much light as possible (to increase the brightness of the display system).
FIG. 1 illustrates a typical conventional micromirror structure 100 formed on a wafer along with multiple other identical micromirror structures at respective different pixel equivalent locations in an array of a DMD MEMS device. The illustrated micromirror 100 comprises a generally rectangular plate-like metallic mirror 106 centrally supported above a hinge 102 by a via support 108. The shape and size of the micromirror 100 may vary dependent upon the arrangement of the array of micromirrors in the DMD, as well as the desired density of the DMD, the fabrication process technology, and so forth. FIG. 1 shows micromirror 100 with a layer of photoresist or other sacrificial material 104 which supports the metal layers deposited for forming mirror 106 and is patterned with an opening for simultaneous formation of via support 108 by conformal deposition of the same metal layers into the patterned opening. Sacrificial layer 104 is subsequently removed in a later processing step to release the mirrors for operation.
As can be seen in FIG. 1, the conformal deposition of thin metal to provide the mirror 106 and via support 108 leaves a central indentation 112 within the reflective top surface of mirror 106. As illustrated in FIG. 2, the central indentation causes incident light rays 110 to be scattered instead of reflecting cleanly either onto or away from the display plane according to the “ON” or “Off” position set for the respective mirror. Although the surface area of via support 108 may be small compared to the surface area of the mirror 106 top surface, the amount of light scattered by indentation 112 may be sufficient to contribute to a decrease in the contrast ratio of the display system. The impact may be more pronounced with downscaling of the mirrors. Central indentation 112 may cause a portion of light incident on mirror 106 during the mirror “ON” state to be reflected away from the display plane, rather than toward it. This may limit the maximum brightness achievable in the displayed image for that pixel “ON” state. Likewise, central indentation 112 may cause a portion of light incident on mirror 106 during the mirror “OFF” state to be reflected toward the display plane, rather than away from it. This may limit the minimum brightness (maximum darkness) achievable in the displayed image.
One approach to reducing undesired scattering is to fill indentation 112 with an antireflective coating so that light striking indentation 112 will be absorbed and prevented from scattering. To apply the coating within the via indentation in light of the current trend for size downscaling may, however, require increasing the size of the via proportional to the size of the mirror. Such variations in design and processing may be incompatible with mirror operation. Moreover, the maximum achievable brightness in the “ON” condition is still reduced due to loss of the absorbed light.
Another approach is to reduce the size of via support 108. A smaller support 108 has a smaller indentation 112 and, with a smaller indentation 112, the ratio of mirror reflective surface area to indentation surface area for the same mirror size will be more, leading to a corresponding increase in the ratio of non-scattered to scattered light. Reducing via support size may, however, interfere with mechanical strength and mirror operation. Also, a smaller via opening may be harder to fill.
Another approach is to minimize the indentation by use of known semiconductor device chemical-mechanical polishing (CMP) or similar planarization techniques. The mirror structure and reflective top surface are, however, very sensitive to changes in parameters such as surface roughness and polish, film thickness and film uniformity and can be easily damaged.
Another approach to addressing the via indentation issue is described in U.S. Pat. No. 7,430,072, the entirety of which is incorporated herein by reference. This approach attempts to eliminate indentations of the reflective surface by depositing a first portion of a mirror surface over the sacrificial layer, applying a protective coating on the mirror surface, forming a cylindrical feature in the indentation by deposition and patterning of a photoresist to invert the via, and then depositing a second portion of the mirror surface over the inverted via. This cylindrical feature, commonly known as a pillar, can have a height less than its diameter. Although the described processing transfers a roughness of the pillar to a roughened area of the second layer immediately covering the via, the amount of light scattered by the roughened area is significantly less than the amount of light scattered by the eliminated indentation.
The claimed invention addresses the above issues and offers alternatives to the described approaches.